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  technical note voltage detector ic series counter timer built-in cmos voltage detector ic bd45 g, b d 4 6 g series general description rohm?s bd45 g and bd46 g series are highly accurate, low current consumpt ion reset ic series. because the counter timer delay circuit is built into those series , an external capacitor for the delay time setting is unnecessary. the lineup was estab lished with tow output types (nch open drain and cmos output) and detection voltages r ange from 2.3v to 4.8v in increments of 0.1v, so that the series may be selected according the application at hand. features 1 detection voltage: 2.3v to 4.8v (typ.), 0.1v steps 2 high accuracy detection voltage: 1.0% 3 ultra-low current consumption: 0.85 a (typ.) 4 three internal, fixed delay ti me: 50 msec, 100 msec and 200 msec 5 nch open drain output (bd45 g), cmos output (bd46 g) 6 ssop5 compact surface mount packages 7 operating temperature range: -40 to +105 applications all electronic devices that use mi crocontrollers and logic circuits selection guide lineup detection voltage marking part number marking part number marking part number marking part number marking part number marking part number 4.8v t0 bd45485 ts bd45481 uj bd45482 va bd46485 w2 bd46481 wu bd46482 4.7v t1 bd45475 tt bd45471 uk bd45472 vb bd46475 w3 bd46471 wv bd46472 4.6v t2 bd45465 tu bd45461 ul bd45462 vc bd46465 w4 bd46461 ww bd46462 4.5v t3 bd45455 tv bd45451 um bd45452 vd bd46455 w5 bd46451 wx bd46452 4.4v t4 bd45445 tw bd45441 un bd45442 ve bd46445 w6 bd46441 wy bd46442 4.3v t5 bd45435 tx bd45431 up bd45432 vf bd46435 w7 bd46431 wz bd46432 4.2v t6 bd45425 ty bd45421 uq bd45422 vg bd46425 w8 bd46421 x0 bd46422 4.1v t7 bd45415 tz bd45411 ur bd45412 vh bd46415 w9 bd46411 x1 bd46412 4.0v t8 bd45405 u0 bd45401 us bd45402 vj bd46405 wa bd46401 x2 bd46402 3.9v t9 bd45395 u1 bd45391 ut bd45392 vk bd46395 wb bd46391 x3 bd46392 3.8v ta bd45385 u2 bd45381 uu bd45382 vl bd46385 wc bd46381 x4 bd46382 3.7v tb bd45375 u3 bd45371 uv bd45372 vm bd46375 wd bd46371 x5 bd46372 3.6v tc bd45365 u4 bd45361 uw bd45362 vn bd46365 we bd46361 x6 bd46362 3.5v td bd45355 u5 bd45351 ux bd45352 vp bd46355 wf bd46351 x7 bd46352 3.4v te bd45345 u6 bd45341 uy bd45342 vq bd46345 wg bd46341 x8 bd46342 3.3v tf bd45335 u7 bd45331 uz bd45332 vr bd46335 wh bd46331 x9 bd46332 3.2v tg bd45325 u8 bd45321 v0 bd45322 vs bd46325 wj bd46321 xa bd46322 3.1v th bd45315 u9 bd45311 v1 bd45312 vt bd46315 wk bd46311 xb bd46312 3.0v tj bd45305 ua bd45301 v2 bd45302 vu bd46305 wl bd46301 xc bd46302 2.9v tk bd45295 ub bd45291 v3 bd45292 vv bd46295 wm bd46291 xd bd46292 2.8v tl bd45285 uc bd45281 v4 bd45282 vw bd46285 wn bd46281 xe bd46282 2.7v tm bd45275 ud bd45271 v5 bd45272 jx bd46275 wp bd46271 xf bd46272 2.6v tn bd45265 ue bd45261 v6 bd45262 jy bd46265 wq bd46261 xg bd46262 2.5v tp bd45255 uf bd45251 v7 bd45252 jz bd46255 wr bd46251 xh bd46252 2.4v tq bd45245 ug bd45241 v8 bd45242 w0 bd46245 ws bd46241 xj bd46242 2.3v tr bd45235 uh bd45231 v9 bd45232 w1 bd46235 wt bd46231 xk bd46232 2007.jul. number specifications description output circuit format 2 open drain output 3 cmos output detection voltage example: displays vdet over a 2.3v to 4.8v range in 0.1v increments. (2.9v is marked as ?29?) fixed delay times 5: 50msec typ. 1: 100msec typ. 2: 200msec typ. part numbe r bd4 g
2/8 absolute maximu m rating (ta=25 ) parameter symbol limits unit power supply voltage vdd gnd -0.3 ~ +10 v nch open drain output gnd-0.3 ~ +10 output voltage cmos output vout gnd-0.3 ~ vdd+0.3 v er pin voltage vct gnd-0.3 ~ vdd+0.3 v power dissipation *1 *2 pd 540 mw operating temperature topr -40 ~ +105 ambient storage temperature tstg -55 ~ +125 * 1 use above ta=25 results in a 5.4mw loss per degree. * 2 when mounted on a 70mm 70mm 1.6mm glass epoxy board. electrical characteristics (unless specified otherwise, ta=-25 ~+105 ) parameter symbol min. typ. max. unit conditions detection voltage *1 v det v det (t) 0.99 v det (t) v det (t) 1.01 v vdd=h l, rl=470k detection voltage temperature coefficient v det / t 100 360 ppm/ ta = - 2 5 +105 (designed guarantee) hysteresis voltage v det v det 0.03 v det 0.05 v det 0.08 v rl=470k ,vdd=l h l circuit current at on *1 i dd1 0.80 2.40 a vdd=v det -0.2v,v det =4.3 4.8v circuit current at off *1 i dd2 0.85 2.55 a vdd=v det +2.0v,v det =4.3 4.8v operating voltage range v opl 0.95 v rl=470k ? ,vol R 0.4v,ta=25 105 ?low? output current i ol 2.0 5.0 ma vds=0.5v,vdd=2.4v,vdet R 2.7v ?high? output current *1 i oh 1.2 2.7 ma vds=0.5v,vdd=6.0v,v det R 4.3v 45 50 55 bd45xx5g,bd46xx5g 90 100 110 msec bd45xx1g,bd46xx1g ?h? transmission delay time *1 *2 t plh 180 200 220 rl=100k cl=100pf bd45xx2g,bd46xx2g *1 guarantee on ta=25 *2 tplh vdd = v det t -0.5 v det t +0.5 designed guarantee. (outgoing inspection is not done an all products.) block diagrams pin no. symbol function 1 er manual reset 2 sub substrate * 3 gnd gnd 4 v out reset output 5 v dd power supply voltage *connect the substrate to gnd. bd45 g bd46 g fig.1 fig.2 vref v out v dd gnd oscillation circuit comter timer er v out vref v dd gnd oscillation circuit comter timer er top view ssop5
3/8 reference data (unless specified otherwise, ta=25 ) fig.3 circuit current 0.0 0.5 1.0 1.5 2.0 01 23 456 78 910 v dd supply voltage v dd [v] circuit current i dd [a] bd45281g 0 5 10 15 20 0.0 0.5 1.0 1.5 2.0 2.5 drain-source voltage v ds [v] "low" output current i ol [ma] v dd =1.2 v bd45281g v dd =2.4 v fig.4 ?low? output current 0 5 10 15 20 0123456 drain-source voltage v ds [v] "high" output current i oh [ma] bd46281g v dd =6.0v v dd =4.8v fig.5 ?high? output current fig.6 i/o characteristics 0 1 2 3 4 5 6 7 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 v dd supply voltage v dd [v] output voltage v out [v] bd45421g ta=25 ta=25 0 5 10 15 20 01234 5678910 er voltage ver[v] output voltage v out [v] bd46281g fig.7 er terminal threshold voltage fig.10 circuit current when on v det -0.2v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 -40 -20 0 20 40 60 80 100 temperature ta[ ] circuit current when on i dd1 [a] bd45421g 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 - 40 -20 0 20 40 60 80 100 temperature ta[ ] circuit current when off i dd2 [a] bd45421g fig.11 circuit current when off fig.8 er terminal input current 0 5 10 15 20 012345678910 er voltage v er [v] er bias current i er [a] bd45421g 0.0 0.5 1.0 1.5 - 40 - 20 0 20 40 60 80 100 temperature ta[ ] minimum operation voltage v opl [a] bd45421g fig.12 operating limit voltage fig.13 output delay time ?low? ?high? 0 10 20 30 40 50 -60 -40 -20 0 20 40 60 80 100 120 temperature ta[ ] "low" delay time t phl [sec] bd45281g t phl 0 10 20 30 40 50 -60 -40 -20 0 20 40 60 80 100 120 temperature ta[ ] "low" delay time t phl [sec] bd45281g t ph l fig.14 output delay time ?high? ?low? fig.9 detection voltage release voltage 3.0 3.4 3.8 4.2 4.6 5.0 5.4 5.8 - 40 0 40 80 temperature ta[ ] detection voltage v det [v] low to hig h(v det + ? v det ) hig h to low(v det ) bd45421g
4/8 reference data examples of leading (tplh) and falling (tphl) output part number tplh[ms] tphl[ s] bd45275g 50 18 bd46275g 50 18 v dd =2.2v 3.2v v dd =3.2v 2.2v *this data is for reference only. the figures will vary with the application, so pl ease confirm actual operati ng conditions before use. explanation of operation for both the open drain type (fig. 15) and the cmos output type (fig. 16), the detection and release voltages are used as thres hold voltages. when the voltage applied to the vdd pins reac hes the applicable threshold voltage, the vo ut terminal voltage switches from eith er ?high? to ?low? or from ?low? to ?high?. because the bd45 g series uses an open drain output type, it is possible to connect a pull-up resistor to vdd or another power supply [the output ?high? voltage (vout) in this case becomes vdd or the voltage of the other power supply ]. fig.15 (bd45 g type internal block diagram) fig.16 (bd46 g type internal block diagram) timing waveform example: the following shows the relationship between the input vo ltages vdd, the output voltage vout and er terminal when the input power supply voltage vdd is made to sweep up and sweep down (the circuits are those in fig. 12 and 13). when the power supply is turned on, the output is unsettled from after over the operating limit voltage (vopl) until tphl. there fore it is possible that the reset signal is not outputted when the rise time of vdd is faster than tphl. when vdd is greater than vopl but less than the reset release voltage (vdet + vdet), the output voltages will switch to low. if vdd exceeds the reset release voltage (v det + v det ), the counter timer start and vout switches from l to h. when more than the high level voltage is supplied er terminal, vout comes to ?l? after tplh delay time. therefore, a time when er terminal is ?h? is necessary for 100 sec or more. when the er terminal switches to low, the counter timer starts to operate, a delay of tplh occurs, and vout switches from ?l? to ?h?. if vdd drops below the detection voltage (v det ) when the power supply is powered down or when there is a power supply fluctuation, vout switches to l (with a delay of tphl). the potential difference between the detection voltage and the release voltage is known as the hysteresis width ( vdet). the system is designed such that the output does not flip-flop with power supply fluctuations within this hysteresis width, preventing malfunctions due to noise. these time changes by the application and use it, please verify and confirm using practical applications. vref r1 r2 r3 v dd gnd oscillation circuit comter timer q1 v out v dd reset er q2 q1 vref r1 r2 r3 v dd gnd oscillation circuit comter timer v out reset er fig.17 v dd v det + v det v det v opl 0v t phl v out t plh t phl t plh v ol v oh v dd t plh t phl v eh er
5/8 circuit applications 1 examples of a common power supply detection reset circuit. application examples of bd45 g series (open drain output type) and bd46 g series (cmos output type) are shown below. case1: the power supply of the microcontroller (vdd2) differs from the power supply of the reset detection (vdd1). use the open drain output type (bd45 g) attached a load resistance (rl) between the output and vdd2. (as shown figure 18) case2: the power supply of the microcontroller (vdd1) is same as the power supply of the reset detection (vdd1). use cmos output type (bd46 g) or open drain output type (bd45 g) attached a load resistance (rl) between the output and vdd1. (as shown figure 19) when a capacitance cl for noise filtering is connected to the vout pin (the reset signal input terminal of the microcontroller), please take into account the waveform of the rise and fall of the output voltage (vout). 2) the following is an example of a circ uit application in which an or connection between two types of detection voltages reset s the microcontroller. when there are many power supplies of the system, power supplie s vdd1 and vdd2 are being monitored separately, and it is necess ary to reset the microcomputer, it is possible to use an or connection on the open drain output type bd45 g series to pull-up to the desired voltage (vdd3) as shown in fig. 20 and make the output ?high? voltage matches the power supply voltage vdd3 of the microcontroller. v dd2 v dd1 v dd3 gnd microcontroller r l bd45 no.1 er v out er v out bd45 no.2 r st v dd1 v dd2 gnd bd45 microcontroller c l noise-filtering capacitor r l fig.18 open collector output type c l noise-filtering capacitor v dd1 gnd bd46 microcontroller fig.19 cmos output type fig.20
6/8 examples of the power supply with resistor dividers in applications where the power supply input terminal (vdd) of an ic with resistor dividers, it is possible that a through curr ent will momentarily flow into the circuit when the output logic switches , resulting in malfunctions (such as output oscillatory state). (through-current is a current that momentarily flows from the power supply (vdd) to ground (gnd) when the output level switches from ?high? to ?low? or vice versa.) fig.21 a voltage drop of [the through-current (i1)] [input resistor (r2)] is caused by the th rough current, and the input voltage to descends, when the output switches from ?low? to ?high?. when the input voltage decreases and falls below the detection voltage, the outp ut voltage switches from ?high? to ?low?. at this time, the through-curr ent stops flowing through output ?low?, and the voltage drop is el iminated. as a result, the output switches from ?low? to ?high?, which again ca uses the through current to flow and the voltage drop. this pro cess is repeated, resulting in oscillation. fig.22 current consumption vs. power supply voltage v out r2 v dd bd45 g bd46 g gnd r1 i1 v1 er cin i dd v dd v det 0 through current
7/8 z operation notes 1 . absolute maximum range absolute maximum ratings are those values beyond which the life of a device may be destroyed. we cannot be defined the failure mode, such as short mode or open mode. therefore a physical security countermeasure, like fuse, is to be given when a specific mode t o be beyond absolute maximum ra tings is considered. 2 . gnd potential gnd terminal should be a lowest voltage potential every state. please make sure all pins, which are over ground even if, include transient feature. 3 . electrical characteristics be sure to check the electrical charac teristics that are one the tentative specif ication will be changed by temperature, supply voltage, and external circuit. 4 . bypass capacitor for noise rejection please put into the capacitor of 1 f or more between vdd pin and gnd, and the capacitor of about 1000pf between vout pin and gnd, to reject noise. if extremely big capacitor is used, transient response might be late. pl ease confirm sufficiently for the point. 5 . short circuit between terminal and soldering don?t short-circuit between output pin and v dd pin, output pin and gnd pin, or vdd pin and gnd pin. when soldering the ic on ci rcuit board, please be unusually cautious about the orientation and the position of the ic. w hen the orientation is mistaken the ic m ay be destroyed. 6 . electromagnetic field mal-function may happen when the device is us ed in the strong electromagnetic field. 7 . the vdd line inpedance might cause o scillation because of the detection current. 8 . a vdd -gnd capacitor (as close connec tion as possible) should be used in high v dd line impedance condition. 9 . lower than the mininum input voltage makes the v out high impedance, and it must be v dd in pull up (v dd ) condition. 10. this ic has extremely high impedance terminals. small leak current due to the uncleanness of pcb surface might cause unexp ected operations. application values in these conditions should be selected ca refully. if the leakage of about 1m is assumed between the er terminal and the gnd terminal, 100k connection between the er terminal and the v dd terminal would be recommended. if the leakage is assumed between the vout terminal and t he gnd terminal, the pull-up resistor should be less than 1/10 of the assumed leak re sistance. 11. external parameters the recommended parameter range for rl is 50k ? 1m . there are many factors (board layout, etc) that can affect characteristics. please verify and confirm us ing practical applications. 12. power on reset operation please note that the power on reset output varies with the vdd rise up time. please veri fy the actual operation. 13. precautions for board inspection connecting low-impedance capacitors to run in spections with the board may produce stress on the ic. therefore, be certain to us e proper discharge procedure before each process of the test operation. to prevent electrostatic accumulation and discharge in the asse mbly process, thoroughly ground yourself and any equipment that could sustain esd damage, and continue observing esd-prevention procedur es in all handing, transfer and storage operations. before attempting to connect components to the test setup, make certain that the power supply is off. likewise, be sure the power supp ly is off before removing any component connected to the test setup. 14. when the power supply, is turned on because of in certain case s, momentary rash-current flow into the ic at the logic unset tled, the couple capacitance, gnd pattern of widt h and leading line must be considered.
8/8 part number selection b d 4 g t r bd45: reset voltage value 23: 2.3v counter timer delay time settings package g ssop5 taping specifications embossed taping open drain type cmos detector ic with built-in counter timer 48: 4.8v 5: 50msec 1: 100msec 2: 200msec bd46: cmos output type cmos detector ic with built-in counter timer ssop5 embossed carrier tape tr (the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand) tape q uantit y direction of feed 3000pcs when you order , please order in times the amount of package quantity . reel direction of feed 1pin x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ssop5 0.1 2.9 0.2 0.13 4 + 6 ? 4 1.6 2.8 0.2 1.1 0.05 0.05 0.05 + 0.2 ? 0.1 + 0.05 ? 0.03 0.42 + 0.05 ? 0.04 0.95 5 4 12 3 1.25max. 0.2min. unit mm the contents described herein are correct as of october, 2005 the contents described herein are subject to change without notice. for updates of the latest information, please contact and confirm with rohm co.,ltd. any part of this application note must not be duplicated or copied without our permission. application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. p lease pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. any data, including, but not limited to application circuit diagrams and information, described herein are intended only a s illustrations of such devices and not as the specifications for such devices. rohm co.,ltd. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose o f the same, implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by rohm co., ltd. is granted to any such buyer. the products described herein utilize silicon as the main material. the products described herein are not designed to be x ray proof. published by application engineering group
notes no technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of rohm co.,ltd. the contents described herein are subject to change without notice. the specifications for the product described in this document are for reference only. upon actual use, therefore, please request that specifications to be separately delivered. application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. rohm co.,ltd. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by rohm co., ltd. is granted to any such buyer. products listed in this document are no antiradiation design. appendix1-rev2.0 thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact your nearest sales office. rohm customer support system the americas / eupope / asia / japan contact us : webmaster@ rohm.co. jp www.rohm.com copyright ? 2007 rohm co.,ltd. the products listed in this document are designed to be used with ordinary electronic equipment or de vices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of which would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. it is our top priority to supply products with the utmost quality and reliability. however, there is always a chance of failure due to unexpected factors. therefore, please take into account the derating characteristics and allow for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in order to prevent possible accidents that may result in bodily harm or fire caused by component failure. rohm cannot be held responsible for any damages arising from the use of the products under conditions out of the range of the specifications or due to non-compliance with the notes specified in this catalog. 21, saiin mizosaki- cho, ukyo-ku, kyoto 615-8585, japan tel : +81-75-311-2121 fax : +81-75-315-0172 appendix


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